At a $21 billion valuation, the chip's performance data remains a black box.
George Hotz, founder of the tiny corp, didn't mince words. He pointed to a stark absence: no third-party benchmarks, no validated FLOPs, no power consumption numbers. Just investor lists, order forms, and glossy hardware photos.
This is the Etched story, a startup that raised $700 million on a promise—trillion-parameter sparse MoE at 80% of theoretical peak, thanks to their LVI (Low Voltage Inference) technology. The chip industry is watching. But as a Layer2 Research Lead who has spent years dissecting cryptographic proofs and protocol claims, I recognize the pattern.
Tracing the gas limits back to the genesis block—here, the genesis block is the transistor. LVI claims to run AI inference at lower voltages, reducing power and heat. The physics is sound: dynamic power scales with the square of voltage. But the catch is signal integrity. Lower voltage means less noise margin, which can cause bit flips in arithmetic units. Etched's whitepaper (if one exists) would need to show error correction mechanisms. Without that data, the claim is a promise, not a proof.
Context: The Etched Stack
Etched is building a custom ASIC designed specifically for transformer inference. Their target is the sparse Mixture-of-Experts (MoE) architecture, which activates only a subset of parameters per token. This sparsity is key to claiming trillion-parameter models at reasonable cost. The LVI technology is their differentiator: by lowering the operating voltage, they claim to reduce energy per inference by a factor of 3-5x compared to competitors like Nvidia's H100 or AMD's MI300.
But here's where the context gets murky. The market is euphoric. AI infrastructure is the new gold rush, and Etched is selling gold pans. The $700 million round was oversubscribed. Jane Street already received a full rack. The Wall Street Journal and Reuters confirmed chip shipments. The narrative is that Etched is about to disrupt the AI hardware duopoly.
Core: The MFU Trap
Model Floating Utilization (MFU) is a ratio: actual computation divided by theoretical peak. Etched claims 80% for sparse MoE. On the surface, impressive. But as chip designer Wesley Yue noted, a high utilization ratio does not mean strong absolute performance.
Let me break this down with a simple analogy. If a car's engine can rev to 10,000 RPM and you achieve 80% utilization (8,000 RPM), that's good. But if another car's engine can rev to 20,000 RPM and achieves only 50% (10,000 RPM), it still outperforms. The absolute throughput matters more than the ratio.
Etched has not disclosed peak FLOPs. Without that number, the 80% MFU is meaningless. A chip with a peak of 100 TFLOPS at 80% gives 80 TFLOPS. A competitor with 300 TFLOPS at 50% gives 150 TFLOPS. The ratio is a distraction.
Dissecting the atomicity of cross-protocol swaps—in chip design, atomicity refers to the indivisibility of a multiply-accumulate operation. LVI might break that atomicity if voltage drops cause timing violations. My experience auditing DeFi protocols taught me that edge cases hide in the corners. For Etched, the edge case is the voltage droop during burst computation. A sudden spike in current demand can cause a momentary voltage drop, leading to errors. Etched's claim of 80% MFU might hold only under ideal conditions, not real-world workloads.
I ran a thought experiment: If Etched's chip achieves 80% MFU but at a lower absolute FLOPs than Nvidia's H100 at 50% MFU, the H100 still wins. The question is whether LVI allows a higher clock speed or wider vector units. Without that data, the pitch is hollow.
Contrarian: The Blind Spot of Specialization
Etched's ASIC is laser-focused on sparse MoE. That's a bet. If the market pivots to dense models or different architectures, the chip becomes obsolete. Composability is a double-edged sword for security—and for hardware. A general-purpose GPU like Nvidia's H100 can handle any workload. Etched's chip is a scalpel. It may outperform for its niche, but the niche might shrink.
Moreover, the LVI technology introduces a thermal stability risk. Lower voltage reduces heat, but the chip's power delivery network must be equally efficient. If the voltage regulator is not fast enough, the chip could suffer from transient faults. I've seen similar issues in Layer2 bridges where optimistic verification assumes no invalid state transitions. The assumption is fragile.
The layer two bridge is just a pessimistic oracle—here, the oracle is the benchmark. Etched's promise of 'leading performance' is an oracle that no one has verified. The only data is from their own tests, which is like a bridge trusting its own messages. The industry needs an independent auditor.
Takeaway: The Proof is in the Inference
Etched has shipped hardware. That's real. But shipping is not the same as validating. The biggest question is not whether the chips exist, but whether they are as powerful as advertised.
In a bull market, euphoria masks technical flaws. Investors see the $700 million and the Jane Street order and assume the tech is sound. But the absence of peak FLOPs and power consumption screams caution.
Finding the edge case in the consensus mechanism—the consensus here is the market's belief that Etched will disrupt. The edge case is the possibility that the chip's performance is only marginally better than existing solutions, or worse. The 80% MFU might be a red herring.
Based on my experience reverse-engineering DeFi protocols, I've learned that claims without reproducible data are noise. Etched needs to release a full technical specification, including peak integer and floating-point throughput, TDP, and third-party benchmarks like MLPerf. Until then, the industry should treat their claims as a promise, not a proof.
The future of AI hardware depends on verifiable performance, not hype. And the most dangerous vulnerability is the one no one has tested.